UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 34693

11.5 Map - Patch available for LUTRAM trimming issue introduced by ISE 11.5.

Description

My design was working fine in ISE Design Suite 11.4, but since I have upgraded to 11.5, the following DRC errors occur when I run BitGen:

"ERROR:PhysDesignRules:1422 - Dangling pins onblock:
< Hard_Ethernet_MAC/Hard_Ethernet_MAC/I_RX0/NO_INCLUDE_RX_VLAN.I_
RX_LL_IF/YES_V6_OR_S6.ELASTIC_FIFO/BU3/U0/grf.rf/mem/gdm.dm/Mram_
RAM5_RAMD >:< LUT_OR_MEM5 >. With dual or single port RAM programming the DI1 and WA1-WA5 pins must be connected.
ERROR:PhysDesignRules:1385 - Dangling pins onblock:< Hard_Ethernet_MAC/
Hard_Ethernet_MAC/I_RX0/NO_INCLUDE_RX_VLAN.I_RX_LL_IF/YES_V6_OR_
S6.ELASTIC_FIFO/BU3/U0/grf.rf/mem/gdm.dm/Mram_RAM5_RAMD_D1 >:
< LUT_OR_MEM6 >. For RAMMODE programming set with DPRAM32 or SPRAM32 or SRL16 the DI2 input pin must be connected."

Is this a known problem?

Solution

This problem is a regression in trimming in ISE Design Suite11.5 related to LUTRAM inputs. The problem is fixed for 12.1, and a patch is available for 11.5.

Linux32

http://www.xilinx.com/txpatches/pub/swhelp/ise11_updates/34693_map_115_lin.tar.gz

To Install:

cd $XILINX

tar zxvf34693_map_115_lin.tar.gz

Linux64

http://www.xilinx.com/txpatches/pub/swhelp/ise11_updates/34693_map_115_lin64.tar.gz

To Install:

cd $XILINX

tar zxvf34693_map_115_lin64.tar.gz

Windows32

http://www.xilinx.com/txpatches/pub/swhelp/ise11_updates/34693_map_115_nt.zip

To Install:, unzip 34693_map_115_nt.zip in the XILINX installdirectory while maintaining directory structure.

Windows64

http://www.xilinx.com/txpatches/pub/swhelp/ise11_updates/34693_map_115_nt64.zip

To Install:, unzip 34693_map_115_nt64.zip in the XILINX installdirectory while maintaining directory structure.

NOTE: Not all occurrences of these errors are due to trimming bugs. This Answer Record is only a good match for your case if the error is occurring in ISE Design Suite 11.5 and appears to be due to invalid trimming of LUTRAM inputs.

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
34678 11.5 EDK, XPS_LL_TEMAC - "ERROR:PhysDesignRules - Invalid configuration..." N/A N/A
AR# 34693
Date Created 03/11/2010
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Spartan-6 LX
  • Spartan-6 LXT
  • Less
Tools
  • ISE Design Suite - 11.5