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AR# 34790 MIG Virtex-6 and 7 Series DDR2/DDR3 - User Interface

Description

This section of the MIG Design Assistant will guide you to details on the User Interface for the Virtex-6 and 7 series FPGAs DDR3/DDR2 designs. Please select from the options below to find information related to your specific question.

NOTE: This answer record is part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.

Solution

(Xilinx Answer 34789) - User Interface and Parameter Descriptions
(Xilinx Answer 33698) - Driving the Core Interface (User Interface / Native Interface)

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
51675 MIG 7 Series Solution Center Design Assistant - Core Functionality N/A N/A

Child Answer Records

Answer Number Answer Title Version Found Version Resolved
33698 MIG 7 Series and Virtex-6 FPGA DDR2/DDR3 - How do I drive the user interface? N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
34789 MIG Virtex-6 and 7 Series DDR2/DDR3 User Interface - Signal and Parameter Descriptions N/A N/A
34282 MIG Design Assistant - Virtex-6 Core Functionality N/A N/A
33698 MIG 7 Series and Virtex-6 FPGA DDR2/DDR3 - How do I drive the user interface? N/A N/A

Actions

AR# 34790
Date Created 05/24/2010
Last Updated 10/04/2012
Status Active
Type Solution Center
Devices
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Virtex-7
  • Artix-7
  • Kintex-7
  • Less
IP
  • MIG
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