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AR# 34903

MIG Virtex-6 DDR2/DDR3 - PHY-Like Controller Responsibilities


This section of the MIG Design Assistant focuses on the "PHY-Like" responsibilities that are handled by the Virtex-6 DDR2/DDR3 design's Controller. Below you will find information related to your specific question.

Note: This Answer Record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.


The Memory Controller design executes the following "PHY-like" responsibilities that are pertinent for proper operation:

(Xilinx Answer 34355) - DDR3 - JEDEC Specification - ZQ Calibration
(Xilinx Answer 34480) - DDR2/DDR3 Periodic Reads

Revision History
09/20/12- Updated link

Linked Answer Records

Associated Answer Records

AR# 34903
Date Created 05/20/2010
Last Updated 02/15/2013
Status Active
Type Solution Center
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
  • MIG