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AR# 35033 Design Assistant for PCI Express - Device is recognized by system, but problems occur

Description

This answer record identifies possible problems if your device is recognized by hardware but not operating correctly.

Note: This Answer Record is a part of the Xilinx Solution Center for PCI Express(Xilinx Answer 34536). TheXilinx Solution Center for PCI Express is available to address all questions related to PCIe. Whether you are starting a new design with PCIe or troubleshooting a problem, use the Solution Center for PCIeto guide you to the right information.

Solution

Once the system is operational, see (Xilinx Answer 35000) regarding removing power, reconfiguring or unplugging the endpoint.

Possible Causes of System Hangs

If the user does not use the trn_trem_n signal properly, it is possible that malformed TLPs can be transmitted which could cause a fatal error on the receiving device. See (Xilinx Answer 35748).

See (Xilinx Answer 35034) regarding completion timeouts. Causing a completion timeout by not responding to incoming memory reads may hang the system.

Revision History

08/13/2010 - Initial Release

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
35748 Design Assistant for PCI Express - Incorrect use of trn_trem_n could cause malformed TLPs to get transferred N/A N/A
35034 Design Assistant for PCI Express - Completion Timeouts Cause the System to Freeze N/A N/A
35000 Design Assistant for PCI Express - What happens if the power if the FPGA is re-configured, power is removed, or card removed during normal operation of the link N/A N/A
34085 Design Assistant for PCI Express - Hardware Debug N/A N/A
34538 Xilinx Solution Center for PCI Express - Design Assistant N/A N/A

Actions

AR# 35033
Date Created 08/06/2010
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Spartan-6 LXT
  • Virtex-5 FXT
  • Virtex-5 LXT
  • More
  • Virtex-5 TXT
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
IP
  • Endpoint Block Plus Wrapper for PCI Express
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )
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