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AR# 35107 Design Assistant for PCI Express - Simulation Debug

This answer record identifies starting points when debugging simulation related issues to PCI Express.

Note: This Answer Record is a part of the Xilinx Solution Center for PCI Express (Xilinx Answer 34536). TheXilinx Solution Center for PCI Express is available to address all questions related to PCIe. Whether you are starting a new design with PCIe or troubleshooting a problem, use the Solution Center for PCIeto guide you to the right information.
General Simulation Questions
(Xilinx Answer 36207) - Start with this answer to debug simulation set-up and licensing issues.
(Xilinx Answer 36785) - This article discusses supported simulators.

Traffic Related Questions
(Xilinx Answer 38548) - Start here if you have questions about simulation traffic.

Revision History
10/11/2010 - Added new sub-group for traffic questions
10/08/2010 - Corrected links.
08/13/2010 - Initial Release
AR# 35107
Date Created 07/19/2010
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LXT
  • More
  • Virtex-6 SXT
  • Spartan-6 LXT
  • Less
IP
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )
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