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AR# 35149

14.7 ISE MAP - How can I partially control or disable global optimization (-global_opt) for specific logical instances?

Description

When global optimization is enabled in MAP, it optimizes the entire design.

Is there a way to prevent the optimization of specific logical instances, such as disabling register duplication on one particular register?

Solution

Global Opt will not optimize logic that has an "S" property applied to the instance or net.

In the case of register duplication, a flip-flop with an "S" property will not be replicated. 

For BUFG auto insertion, an "S" property on the net will block the insertion.

 

Examples:

INST "ff_name" S;

NET "net_name" S;

AR# 35149
Date Created 04/08/2010
Last Updated 01/07/2015
Status Active
Type General Article
Devices
  • FPGA Device Families
Tools
  • ISE Design Suite