The common clock is used to repeat a signal across all banks. Thus, a common clock signal is a direct path to a pin with no runtime dynamic switching option for the signal.
The use model of having 1 signal repeat on all banks is common. When probing clock sources, this is a valuable reference signal used to measure other relative signal activity. So, for instance you may want to see how a counter toggles with respect to its source clock or a reference clock used to create the source clock. For these debug measurements, the clock probed is repeated for every bank, usually in the same position. Hence, the need for a common clock. This has been introduced for Spartan-6 in 11.x, and in 12.1 will be extendeding this option to all families.
Note, you can have 1 or more common clock ports. When you have more ports you simply increase the number of direct pin connections that do not switch dynamically.