Description

This Answer Record contains the Release Notes for the LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v10.4 Core (released in the ISE Design Suite 12.1), and includes the following:

• New Features
• Resolved Issues
• Known Issues

For installation instructions, general CORE Generator software known issues, and design tools requirements, see the IP Release Notes Guide at:
http://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf

Solution

New Features

• ISE 12.1 software support
• QPro Virtex-6 FPGA Hi-Rel support
• QPro Spartan-6 FPGA Hi-Rel support
• QPro Virtex-5 FPGA Hi-Rel support

Resolved Issues

• (Xilinx Answer 34781)LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v10.3 - Virtex-6 FPGA block RAM parameterization might result in memory collisions during simulation and erroneous operation
• (Xilinx Answer 35067)LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v10.3 - Spartan-6 FPGA block RAM parameterization might result in memory collisions during simulation and erroneous operation
• (Xilinx Answer 33898) LogiCORE Ethernet 1000BASE-X PCS/PMA or SGMII v10.3 - The Core is not visible in CORE Generator interface for supported architectures
• (Xilinx Answer 33416) 11.3 NetGen - NetGen assigns incorrect value to SIM_DEVICE attribute causing simulation failure
• (Xilinx Answer 35084)LogiCORE Ethernet 1000BASE-X PCS/PMA or SGMII v10.3 - Data sheet lists incorrect speed grade for Spartan-6 devices

Known Issues

• (Xilinx Answer 35338)LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII - Meeting GMII setup and hold times on an external interface when targeting Spartan-6 FPGAs