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AR# 35334

LogiCORE IP Initiator, Target v4.12 for PCI - Release Notes and Known Issues for ISE Design Suite 11.4


This Release Notes and Known Issues Answer Record is for the LogiCORE IP Initiator, Target v4.12 for PCI , released in ISE Design Suite 12.1, and contains the following information:
  • General Information
  • New Features
  • Bug Fixes
  • Known Issues

For installation instructions, general CORE Generator interface known issues, and design tools requirements, see the IP Release Notes Guide at:


General Information

The LogiCORE IP Initiator Target for PCI v4.12 supports Virtex-5 and Spartan-6 architectures only. For all other devices, use the v3.167 PCI Core. For more information on this core, refer to (Xilinx Answer 32324).

TheSpartan-6 LX100and LX100T FPGAs (6slx100 or 6slx100t) are not supported in this release. These solutions are pending further silicon characterization to ensure timing can be met.

New Features
  • ISE Design Suite12.1 support
  • Additional Spartan-6 device support

Resolved Issues
  • None

Known Issues
(Xilinx Answer 35355) - Initiator, Target v4.12 for PCI - Hold Time Violations When Implementing with the Spartan-6 LX45 or LX45T FPGAs (6slx45 or 6slx45t)
(Xilinx Answer 36243) - Initiator, Target v4.12 for PCI - Spartan-6 FG484 Package Pinout Changes Required for ISE 12.2 software
Revision History
04/23/2010- Initial Release
06/21/2010 - Added 36243

Linked Answer Records

Associated Answer Records

AR# 35334
Date 05/20/2012
Status Active
Type Release Notes
  • Spartan-6 LX
  • Spartan-6 LXT
  • Virtex-5 FXT
  • More
  • Virtex-5 LX
  • Virtex-5 LXT
  • Virtex-5 SXT
  • Less
  • ISE Design Suite - 12.1
  • 64-bit Initiator/Target for PCI
  • 32-bit Initiator/Target for PCI
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