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AR# 35395 LogiCORE IP Motion Adaptive Noise Reduction v1.0 - Spartan-6 core should only be gnerated in 12.1 an later due to potential block RAM memory related problems

TheMotion Adaptive Noise Reduction v1.0 Spartan-6 FPGA core should only be generated in ISE 12.1 design toolsor later due to potential block RAM memory related problems.

These issues are resolved in ISE Design Tools 12.1, and therecommendation is to regenerate and implement theMotion Adaptive Noise Reduction v1.0 in 12.1 or later.


Motion Adaptive Noise Reduction v1.0 in 11.4 and 11.5 has the potential for memory initialization issues as documented in the following Xilinx Answers:

(Xilinx Answer 34659) Spartan-6 FPGA Block RAM - Output Register of BRAM does not Initialize Correctly After Initial Configuration

(Xilinx Answer 34712) Spartan-6 FPGA Block RAM Design Advisory - 9K Simple Dual Port (SDP) Block RAM Initialization Incorrect

Please see (Xilinx Answer 33751) for a detailed list of LogiCORE Motion Adaptive Noise Reduction Release Notes and Known Issues.

AR# 35395
Date Created 04/26/2010
Last Updated 12/15/2012
Status Active
Type General Article
IP
  • Motion Adaptive Noise Reduction
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