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AR# 35412

Design Assistant for PCI Express - Can Pinouts Be Changed?


Can I change the pinouts and not use those provided in the generated UCF file?


Xilinx recommends not changing the pinouts for the MGT locations. The provided pinouts generated by CORE Generator and documented in the User Guide are tested and are known to meet timing. Other pinouts may not allow for timing closure.

Revision History
07/30/2011 - Initial Release

AR# 35412
Date Created 07/29/2011
Last Updated 12/15/2012
Status Active
Type General Article
  • Endpoint Block Plus Wrapper for PCI Express
  • Endpoint Block Wrapper for PCI Express
  • Endpoint for PCI Express (Soft-IP)
  • More
  • Endpoint PIPE for PCI Express
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )
  • Less