AR# 35438 Xilinx Implementation Tool Solution Center - MAP section of Design Assistant
Description
Please refer to the following to learn more about the MAP section of the Xilinx Implementation Tools or to find help on debugging an issue you are currently encountering.
Note: This Answer Record is a part of the Design Assistant section (Xilinx Answer 34756) of the Xilinx Implementation Tool Solution Center (Xilinx Answer 34752). The Xilinx Implementation Tool Solution Center is available to address questions related to Xilinx Implementation Tools.
Solution
Explanation of MAP tool functions:
See (Xilinx Answer 33340) for information on Multi-Threading.
See (Xilinx Answer 35504) for information on "S" (Save) and KEEP (External) properties.
See (Xilinx Answer 35505) for information on Logical and Physical DRC checking.
See (Xilinx Answer 25051) for information on managing IDELAYCTRL usage.
Debugging Tips for MAP Issues:
See (Xilinx Answer 35506) for information on debugging Logical and Physical DRC errors.
See (Xilinx Answer 23990) for information on debugging MAP trimming issues.
See (Xilinx Answer 23363) for information on debugging MAP crashes.
High Frequency MAP Issues:
See (Xilinx Answer 21435) Virtex-4 DCM auto-calibration
Latest MAP Issues:
See (Xilinx Answer 34693) Patch available for LUTRAM trimming issue.