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AR# 35440 Xilinx Implementation Tool Solution Center - Place Section of Design Assistant

Please refer to the followingto learn more about the PLACE sectionofthe Xilinx Implementation Tools or to find help on debugging an issue you are currently encountering.

Note: This Answer Record is a part of the DesignAssistant section (Xilinx Answer 34756) of theXilinx Implementation Tool Solution Center (Xilinx Answer 34752) The Xilinx Implementation Tool Solution Center is available to address questions related to Xilinx Implementation Tools.

Explanation of Place tool functions:

See (Xilinx Answer 35534) for information on Placement Cost Tables.
See (Xilinx Answer 35536) for information on using SmartXplorer Variability Passes to replace PAR's old MPPR functionality.

Debugging Tips for Place Issues:

See (Xilinx Answer 35537) for information on debugging ClockPlacement Failures.
See (Xilinx Answer 35539) for information on debugging Place:543 fitting failures.

High Frequency Place Issues:

See (Xilinx Answer 33632) for Place:1018 errors.
See (Xilinx Answer 21724) for Place:645 errors.

Latest Place Issues:

See (Xilinx Answer 33632) error does not adequately describe the cause of an error.

Associated Answer Records

Answer Number	Answer Title	Version Found	Version Resolved
34752	Xilinx Implementation Tools Solution Center	N/A	N/A
34756	Xilinx Implementation Tools Solution Center - Design Assistant	N/A	N/A

Actions

AR# 35440
Date Created	05/07/2010
Last Updated	12/15/2012
Status	Active
Type	General Article
Devices	Spartan-3 Spartan-3 XA Spartan-3A More Spartan-3A DSP Spartan-3AN Spartan-3E Spartan-6 LX Spartan-6 LXT Virtex-5 FXT Virtex-5 LX Virtex-5 LXT Virtex-5 SXT Virtex-5 TXT Virtex-5Q Virtex-6 CXT Virtex-6 HXT Virtex-6 LX Virtex-6 LXT Virtex-6 SXT Less
Tools	ISE Design Suite - 11.1 ISE Design Suite - 11.2 ISE Design Suite - 11.3 More ISE Design Suite - 11.4 ISE Design Suite - 11.5 Less

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