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AR# 35468

Configuration - CRC error reported after disabling CRC checking

Description

After I disable CRC checking in BitGen when generating the bit/bin file, INIT goes Low and iMPACT still reports:

"INFO:iMPACT:2217 - Error shows in the status register, CRC Error bit is NOT 0."
'3': Reading status register contents...
CRC error : 1
...

CRC checking is disabled, so why do I still see an error?

Solution

Disabling CRC checking in BitGen has two effects on a bit file:

  • It sets a bit in the COR register to disable the CRC calculation on incoming configuration data.
  • It inserts a default value in the CRC register writes that allows the check to pass. The value (0x0000DEFC) is loaded to the CRC register writes. This 0x0000DEFC appears twice in bit/bin, occupying the previous CRC value's position,just prior to loading thelast frame and again at the very end of the bit/bin. If the 16 LSB of this value - DEFC - are corrupted, a CRC error is triggered, so INIT will drive Low and the CRC_ERROR bit in the status register asserts to 1. The root cause is data corruption or signal integrity issues.


AR# 35468
Date Created 04/29/2010
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Spartan-3
  • Virtex-5 LX
  • Virtex-5 LXT
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  • Virtex-5 SXT
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Tools
  • ISE Design Suite - 11.5