The code for the tx_sync module only holds TXENAPHASEALIGN for 32 cycles before asserting TXPMASETPHASE. It should hold it for 512 cycles. It is a simple matter to modify the code to extend the wait_before_setphase_counter_r register from 6 bits to10 bits, set the initialization value to 10 bits of 0, and to tie count_32_complete_r to bit 9 rather than bit 5. These modifications will increase the counter from 32 cycles to the appropriate 512 cycles.
These changes will be includedin v1.6 of the Spartan-6 GTP Transceiver Wizard.