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AR# 35653

Virtex-6 FPGA GTX Transceiver - Updates to Wizard outputs for Serial ATA (SATA) Gen1 and Gen2

Description

Some modifications need to be made to the outputs of Virtex-6 FPGA GTX Wizard v1.6 and earlier for optimal performance in SATA applications. This answer record discusses what changes need to be made.

Solution

Gen2 rates:

SATA Gen2 (3.0Gb/s) using a 150 MHz ref clock:

1) Receiver and Termination:

AC_CAP_DIS = TRUE
RCV_TERM_GND = FALSE
RCV_TERM_VTTRX = TRUE
PMA_RX_CFG=05CE049

2) PLL setting:

RX/TXPLL_DIVSEL_OUT=1
RX/TXPLL_DIVSEL45_FB=5
RX/TXPLL_DIVSEL_FB=2
RX/TXPLL_DIVSEL_REF=1
TXPLL_SATA=2'b01

3) OOB Signaling:

SATA_BURST_VAL=5
SATA_IDLE_VAL=5


SATA Gen1 (1.5Gb/s) using a 150 MHz ref clock

1) Receiver and Termination

AC_CAP_DIS = TRUE
RCV_TERM_GND = FALSE
RCV_TERM_VTTRX = TRUE
PMA_RX_CFG=05CE049

2) PLL setting

RX/TXPLL_DIVSEL_OUT=2
RX/TXPLL_DIVSEL45_FB=5
RX/TXPLL_DIVSEL_FB=2
RX/TXPLL_DIVSEL_REF=1
TXPLL_SATA=2'b01

3) OOB Signaling

SATA_BURST_VAL=5
SATA_IDLE_VAL=5
AR# 35653
Date Created 05/12/2010
Last Updated 03/07/2013
Status Active
Type General Article
Devices
  • Spartan-6 LXT
  • Virtex-6 CXT
  • Virtex-6 LXT
  • Virtex-6 SXT
IP
  • Virtex-6 FPGA GTX Transceiver Wizard