^
Advanced Search

AR# 35722 Design Assistant for PCI Express - How to add a PCI Express cores to Project Navigator?

Description

Can a core for PCI Express be implemented using Project Navigator?

Note: This Answer Record is a part of the Xilinx Solution Center for PCI Express (Xilinx Answer 34536). The Xilinx Solution Center for PCI Express is available to address all questions related to PCIe. Whether you are starting a new design with PCIe or troubleshooting a problem, use the Solution Center for PCIe to guide you to the right information.

Solution

The cores can be implemented using ISE Project Navigator. It is not recommended to add the generated core's xco to an ISE project because it may cause an error similar to this:

ERROR:HDLCompiler:559 - "s6_pcie_v1_2.v" Line 421: Could not find module/primitive <pcie_bram_top_s6>.
Module s6_pcie_v1_2 remains a blackbox, due to errors in its contents
Instead, generate the core in CORE Generator tool and add all of the core's wrapper source code from source directory.

Revision History
08/13/2010 -Initial Release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34538 Xilinx Solution Center for PCI Express - Design Assistant N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
36174 Design Assistant for PCI Express - Start here for questions regarding Synthesis or Implementation N/A N/A
34538 Xilinx Solution Center for PCI Express - Design Assistant N/A N/A

Actions

AR# 35722
Date Created 08/06/2010
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Virtex-5 FXT
  • Virtex-5 LXT
  • Virtex-5 SXT
  • More
  • Virtex-5 TXT
  • Virtex-6 SXT
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LXT
  • Spartan-6 LXT
  • Less
IP
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )
  • Endpoint Block Plus Wrapper for PCI Express
Feed Back