The Spartan-6 FPGA Memory Controller Block (MCB) has new data rate specifications and performance modes for DDR2 interfaces as specified in the Spartan-6 FPGA Data Sheet v1.5(DS162): http://www.xilinx.com/support/documentation/data_sheets/ds162.pdf.
NOTE: These data rate changes do not apply to DDR3 interfaces.For full details, see (Xilinx Answer 41520).
For designs that were planning totarget a frequencyfor a certain speed grade which is now in the Extended Performance mode, two options are available:
A VCCINT range of 1.20V to 1.26V is 1.23V +/- 2.5%. Various regulators support this operating range. The 1.23V nominal VCCINT results in a higher nominal ICCINT; see (Xilinx Answer 35866).
The ISE 12.1 software reflects the original timing specifications. When using the MIG/MPMC tools, make sure a valid performance limit is specified for the interface according to the speed grade and VCCINT range that is being used.
The ISE 12.2 software in July 2010 reflects the new timing specifications both in the MIG/MPMC selections and in the speed file.A CONFIG constraint is available to specify whether the VCCINT will use the 1.14V-1.26V range, with theStandard MCB performance, or the 1.20V-1.26V range, with theExtended MCB performance.This constraint is automatically inserted into the UCF file based on the selection made in the MIG GUI delivered with ISE 12.2 software. MPMC users need to manually add the constraint to the UCF.
The new constraint, to be used with the ISE 12.2 and later software:
CONFIG MCB_PERFORMANCE = STANDARD| EXTENDED
Differentiating Devices Tested to Original and New Specifications
The devices tested to the original specifications are limited to the LX16 and LX45 -2C devices.They are differentiated by the JTAG ID Revision Code of "2". The LX16 and LX45 -2C devices with a JTAG ID Revision Code of "3" are the devices tested to the new specifications.The mask revision code is the same for both.The devices tested to the original specification are no longer available and cannot be directly ordered as such.
All other Spartan-6 devices are characterized to the new specifications listed in the table above, and the Spartan-6FPGAData Sheet (DS162):
To see a list of other recent and important MCB Answer Records, refer to:
(Xilinx Answer 33566) Design Advisories for MIG including DDR3, DDR2, DDR, Spartan-6 FPGA MCB, RPDRAMII, QDRII+, QDRII, DDRII cores
(Xilinx Answer 34587) MIG v3.4 - Release Notes and Known Issues for ISE Design Suite 12.1
(Xilinx Answer 34609) 12.x EDK - Master Answer Record List