This answer record includes links to documentation for the solutions of PCI Express.
NOTE: This answer record is part of the Xilinx Solution Center for PCI Express (Xilinx Answer 34536). The Solution Center is available to address all questions related to PCIe. Whether you are starting a new design with PCIe or troubleshooting a problem, use the Solution Center for PCIe to guide you to the right information.
7 Series FPGAs
http://www.xilinx.com/support/documentation/ipbusinterfacei-o_pci-express_7series-integrated-block.htm
Virtex-6 FPGAs
http://www.xilinx.com/support/documentation/ipbusinterfacei-o_pci-express_v6pciexpressendpointblock.htm
Spartan-6 FPGAs
http://www.xilinx.com/support/documentation/ipbusinterfacei-o_pci-express_s6pciexpressendpointblock.htm
Virtex-5 FPGAs
http://www.xilinx.com/support/documentation/ipbusinterfacei-o_pci-express_v5pciexpressblockplus.htm
Endpoint Pipe
http://www.xilinx.com/support/documentation/ipbusinterfacei-o_pci_do-di-pcie-pipe.htm
AXI Bridge for PCI Express
http://www.xilinx.com/support/documentation/ipembedprocess_peripheralpci_axi-pcie.htm
PLBv46 Bridge for PCI Express
http://www.xilinx.com/support/documentation/ipembedprocess_peripheralpci_plbv46pcie.htm
PCIe Design Advisory Answer Records
(Xilinx Answer 33775) - Design Advisory for the Virtex-6 FPGA Integrated Block Wrapper for PCI Express
(Xilinx Answer 33776) - Design Advisory for the Spartan-6 FPGA Integrated Block Wrapper for PCI Express
(Xilinx Answer 33580) - Design Advisory for the Virtex-5 FPGA Endpoint Block Plus Wrapper for PCI Express
Release Notes
http://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf
Boards and Kits
Virtex-6 ML605
http://www.xilinx.com/support/documentation/ml605.htmSpartan-6 SP605
http://www.xilinx.com/support/documentation/sp605.htmVirtex-5 ML555
http://www.xilinx.com/support/documentation/ml555.htm
Targeted Reference Designs and Connectivity Kits
Virtex-6
http://www.xilinx.com/support/documentation/virtex-6_fpga_connectivity_kit.htmSpartan-6
http://www.xilinx.com/support/documentation/spartan-6_fpga_connectivity_kit.htm
White Papers
Understanding Performance of PCI Express Systems
http://www.xilinx.com/support/documentation/white_papers/wp350.pdf
Application Notes
XAPP859: Virtex-5 FPGA Integrated Endpoint Block for PCI Express Designs: DDR2 SDRAM DMA Initiator Demonstration Platform
http://www.xilinx.com/support/documentation/application_notes/xapp859.pdfXAPP1002: Using ChipScope Pro to Debug Endpoint Block Plus Wrapper, Endpoint, and Endpoint PIPE
http://www.xilinx.com/support/documentation/application_notes/xapp1002.pdfXAPP 1022: Using the Memory Endpoint Test Driver (MET) with the Programmed Input/Output Example Design for PCI Express Endpoint Cores
http://www.xilinx.com/support/documentation/application_notes/xapp1022.pdfXAPP 1052: Bus Master DMA Performance Demonstration Reference Design for the Xilinx Endpoint PCI Express Solutions
http://www.xilinx.com/support/documentation/application_notes/xapp1052.pdf
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 34536 | Xilinx Solution Center for PCI Express | N/A | N/A |