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AR# 36019

Virtex-6 FPGA Integrated Block for PCI Express - Coregen allows generating a x8 Gen 2 design for the XC6VLX550T-2; But this is not supported


In ISE software 12.1, the v1.5 core allows the user to generate a x8 Gen 2 design for the XC6VLX550T-2. The problem is that x8 Gen 2 is not supported in this part for a -2 speedgrade. Implementing will likely result in timing failures.


There is no workaround for this since there is no -3 speed grade currently available for this part.

Revision History
06/03/2010 - Initial Release

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AR# 36019
Date 05/20/2012
Status Active
Type Known Issues
  • Virtex-6 LXT
  • ISE Design Suite - 12.1
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )
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