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AR# 36103

Serial RapidIO v5.4 - Virtex-6 implementation fails with "ERROR:MapLib:1229 - GTXE1 rio_de_wrapper/phy_wrapper_inst..."


When implementing a Serial RapidIO v5.4 Core and targeting a Virtex-6 FPGAin ISE tools 12 or later, several errors similar to the following may be encountered:

ERROR:MapLib:1229 - GTXE1rio_de_wrapper/phy_wrapper_inst/srio_gt_wrapper/gtx_wrapper_i/gtx0_gtx_wrapper_i/gtxe1_i has TX_BUFFER_USE set to TRUE and POWER_SAVE<4> different than '1', which is invalid


This is due to a change in the Virtex-6 FPGA GT Wrappers thatare now required regarding the POWER_SAVE attributes. To work around this issue, it is highly recommended that you upgrade to v5.5 of the Core. If you are unable to do this, you can generate the v5.5 Core for your design and use the new GT Wrappers within the v5.4 Core.
AR# 36103
Date 12/15/2012
Status Active
Type General Article
  • ISE Design Suite - 12.1
  • Serial RapidIO
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