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AR# 3631

FPGA Configuration: Unconnected MODE pins may result in failed configuration for 4000/X devices


Urgency: HOT

General Description:

FPGAs may configure at power-up, but will sometimes not properly reconfigure when the MODE Pins

(M2 M1 M0) are left unconnected. It is also possible for the FPGA to not configure or operate

normally at all in this circumstance.


For the XC4000 devices, the Xilinx DataBook demonstrates the use of leaving MODE pins

unconnected when a Logic High is desired on that pin. This is because the FPGA has internal pullups

on these PADs.

It has been descovered that some parts may have pullups on the MODE pins that are too weak and

allow the pin to float. Allowing these pins to float can disrupt normal operation of the configuration


It is therefore recommended that MODE pins never be left unconnected. Always use a PULLUP or

PULLDOWN in the absence of any other external source for these lines.

If it is reconfiguration of a part that seems to be failing:

configuring the mode pins with pull-ups may help them stay

in the proper state when a reconfiguration is initiated.

Use the bitgen option in the template manager:


AR# 3631
Date Created 08/21/2007
Last Updated 05/07/2014
Status Archive
Type General Article