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AR# 36595

Design Assistant for PCI Express - Can the User Application implement capabilities in the PCI Legacy or PCIe Extended Configuration Space?


How can I access the unused legacy or extended configuration space in the integrated block?
NOTE: This Answer Record is part of the Xilinx Solution Center for PCI Express(Xilinx Answer 34536) TheXilinx Solution Center for PCI Express is available to address all questions related to PCIe. Whether you Are starting a new design with PCIe or troubleshooting a problem, use the Solution Center for PCIeto guide you to the right information.


The legacy PCI configuration space is located at offset 3Fh to FFh and is used to implement the various PCI capability sets. The Xilinx core's implement three capabilities which are the Power Management, MSI, and PCI Express capability. The rest of the space is not used. The PCIe extended configuration space starts at address 100h to FFFh. Depending on the core, some extended capability also implemented.
Users of the Virtex-5FPGAEndpoint Block Plus core cannot access the unused space for user purposes. However, Virtex-6 and Spartan-6 FPGA integrated block users can implement their own capabilities and have configuration transactions forwarded on to the user by enabling 'PCI Configuration Space Enable' and 'Extended PCI Configuration Space Enable' in the CORE Generator GUI (this is described in the User Guide).To help locate the correct User Guide, see (Xilinx Answer 35920)
Revision History
08/13/2010 - Initial Release

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
35920 Xilinx Solution Center for PCI Express - Documentation N/A N/A
34538 Xilinx Solution Center for PCI Express - Design Assistant N/A N/A
AR# 36595
Date Created 07/30/2010
Last Updated 12/15/2012
Status Active
Type General Article
  • Spartan-6 LXT
  • Virtex-5 FXT
  • Virtex-5 LXT
  • More
  • Virtex-5 SXT
  • Virtex-5 TXT
  • Less
  • Endpoint Block Plus Wrapper for PCI Express
  • Virtex-6 FPGA Embedded Tri-mode Ethernet MAC Wrapper
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )