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AR# 36649

12.2 Project Navigator - Configuration Clock Rate not preserved when migrating an 11.x project


When I migrate an ISE Design Suite 11.x project to 12.1, the configuration clock rate property resets to default value (2 MHz) from a custom setting.


In ISE Design Suite 12.1, the Configuration Rate property is converted to be a device specific property. However, a user selected value fails to be correctly applied.

To resolve this issue, set the property again to the desired value.

Note: In ISE DS 12.2 the 33, 40, 50 and 60 MHz have been removed from the list of supported bitgen configuration rate options for Spartan-6 FPGA. 26 MHz is the maximum configuration rate for Spartan-6 FPGA.
AR# 36649
Date 07/22/2010
Status Active
Type General Article
  • ISE Design Suite - 12.1
  • ISE Design Suite - 12.2
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