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AR# 36824

LogiCORE IP DUC/DDC Compiler v1.0- Why do I receive an error message about invalid frequency if I target a Virtex-6Q -1M speedgrade?


Why do I receive the following error message if I input a frequency greater than 290 MHz for a Virtex-6Q -1M speedgrade?

"ERROR:sim - Clock_Frequency: Invalid value 'xx'.
 ERROR:sim - Failed to initialise IP model.
 ERROR:sim - Unable to configure IP model for generator   'implementation_netlist_generator'.

where xx is a frequency between 290 MHz and 400 MHz."


This is an issue with the GUI. The work-around is to select a -1 speedgrade instead. Every part that has a -1M speedgrade is also available in a -1 speedgrade.
For a detailed list of LogiCORE IP DUC/DDC Compiler Release Notes and Known Issues, see (Xilinx Answer 36823)
AR# 36824
Date 05/23/2014
Status Archive
Type Error Message
  • DUC/DDC Compiler
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