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AR# 37219

LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v10.5 - Timing Errors seen in some cases using Virtex-6 LVDS Solution

Description

Timing errors can occasionally occur in the DRU module of the XAPP881 based example design.

Solution

In v10.5 rev1, extra pipeline registers have been added to the Data Recovery Unit (DRU) module of the XAPP881 based example design to resolve this issue. 

Rev1 of the core can be installed by downloading the patch available in (Xilinx Answer 36674).

Linked Answer Records

Master Answer Records

AR# 37219
Date Created 08/03/2010
Last Updated 09/08/2014
Status Active
Type General Article
Devices
  • Virtex-6 HXT
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT
Tools
  • ISE Design Suite - 12.2
IP
  • Ethernet 1000BASE-X PCS/PMA or SGMII