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AR# 37234

14.x Constraints - Spartan-6 - How to find out which I/O are in related regions if the UG385 package and pinout information has errors

Description

How to find out which I/O are in related regions if the UG385 package and pinout information has errors?

If BUFIO2s are used as clock path for capturing data from regular I/Os, BUFIO2(GCLKs) and regular I/Os must be placed into the same half bank. In order to find out the I/Os related to the specific region, the BUFIO2 region information is added in UG385.

Solution

There are eight BUFIO2 regions for Spartan-6 FPGA:
TL, TR, RT, RB, BR, BL, LB, and LT
BANK0includes TL and TR
BANK1and BANK5 include RT and RB
BANK2includes BR and BL
BANK3and BANK4 include LB and LT
Generally, you should choose the banks on which the signals will be placed, and then the BUFIO2 region.
For example,
If you plan to place the CLOCK signals into theBR region of BANK2, you can find out the viable IOB in BR for data signals by using constraint :

"Inst clock_name Loc = BR"
"Inst data[1]_name Loc = BR"
"Inst data[2]_name Loc = BR"
....
"Inst data[n]_name Loc = BR"
After runing implementation, you can get the specific IOB sites in PlanAhead or FPGA Editor.
AR# 37234
Date Created 01/16/2013
Last Updated 01/16/2013
Status Active
Type General Article
Devices
  • Spartan-6