We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Page Bookmarked

AR# 37250

Xilinx Configuration Solution Center - Top Issues


The following answer records cover current known issues as well as commonly asked questions related to configuration.

Note: This answer record is part of the Xilinx Configuration Solution Center (Xilinx Answer 34904)

The Xilinx Configuration Solution Center is available to address all questions related to Configuration.


Top 10 Most Viewed Configuration Articles

(Xilinx Answer 35924)  10.1, 11.x - ISE - Installation of Cable Drivers for ISE 10.1, 11.x on Windows 7 
(Xilinx Answer 44397) 13.x/14.x iMPACT - Cable Driver Installation - Installation passes on Windows 7 but the Jungo driver Windrvr6 does not operate or appear in the device manager
(Xilinx Answer 54381) Xilinx Programming Cables - Platform Cable USB and Praleel Cable IV - Driver install FAQ
(Xilinx Answer 54382) Digilent Programming Cable - Driver Install FAQ
(Xilinx Answer 11433) JTAG - Do the JTAG pins need external pull-ups? What should I do with unused JTAG pins?
(Xilinx Answer 59572) Design Advisory for Spartan-3AN FPGA in-system flash change and programming solution updates
(Xilinx Answer 57045) Design Advisory for Artix-7, Kintex-7 - When CFGBVS is set to VCCO of Bank 0, then Banks 14 and 15 are limited to 3.3V or 2.5V for Configuration
(Xilinx Answer 62631)  Design Advisory for Vivado 2014.3 - Program eFUSE Registers operation failure for 7 series and UltraScale FPGAs
(Xilinx Answer 23174) PROMGen - Is it possible to convert an MCS file into a BIN (HEX or EXO) file?
(Xilinx Answer 37257) Configuration Design Assistant - FPGA Device Specific Issues

iMPACT Release Notes

In each major software release there are new features added as well as critical fixes made. The Release Notes outline these new features and fixes.

(Xilinx Answer 32657)  iMPACT - ISE Design Suite 11 Standalone Programming Tools (iMPACT) Updates
(Xilinx Answer 35448) 12.1 iMPACT - Release Notes and Known Issues
(Xilinx Answer 32440) 11.1 iMPACT - Release Notes and Known Issues
(Xilinx Answer 30307)  10.1 iMPACT - Release Notes and Known Issues
(Xilinx Answer 12740) Programming Tools/Lab Install - Where can I download the latest JTAG Programmer version, or the latest version of iMPACT?
(Xilinx Answer 12858) How do I download iMPACT from WebPACK?

iMPACT Errors

The following are common errors that can occur when using the software. These articles provide guidance to resolve these issues.

(Xilinx Answer 13529) iMPACT - "ERROR:iMPACT:583 - '2' The IDCODE read from the device does not match the IDCODE in the BSDL file"
(Xilinx Answer 22160) iMPACT - "ERROR:iMPACT:585 - A problem may exist in the hardware..."
(Xilinx Answer 22228) iMPACT - "ERROR:Bitstream:2" and "ERROR:iMPACT:123 - Mask file" are generated during FPGA configuration
(Xilinx Answer 32938)  iMPACT - "INFO:iMPACT - Failed to initialize MDM interface" when running BPI Indirect Programming

iMPACT Usage

This section details the significance of different operations in iMPACT and outlines the debugging steps if each operation fails.

(Xilinx Answer 8902)  iMPACT - What is "IDCODE looping?"
(Xilinx Answer 11857)  iMPACT - What is "Initialize Chain?"
(Xilinx Answer 29578) iMPACT - How do I program third-party SPI Flash which are used for SPI configuration mode?
(Xilinx Answer 24024) iMPACT - How can the data from the Status Register be used to debug configuration issues?
(Xilinx Answer 34909) iMPACT - What do the different bits in a Status Register Read and BOOTSTS mean?

PROM Files

These articles detail how to change a ".bit" file into any required PROM file format.

(Xilinx Answer 36210) PROMGen - How can file formats be changed or have files bitswapped?
(Xilinx Answer 18884) PROMGen - How is the PROM MCS file checksum calculated?
(Xilinx Answer 476)  PROMGen - Description of PROM/EEPROM file formats: MCS, EXO, HEX, and others

System Ace CF

These articles provide helpful debugging information for use with the System ACE CF tool.

(Xilinx Answer 14456) System ACE CF - The ERROR LED turns on when I attempt to configure devices with a CF device formatted on Windows 2000 or Windows XP
(Xilinx Answer 34948) System ACE - Commodity CompactFlash Issues with System ACE Controller.

Cable Support

This information is useful when debugging cable operation is required.

(Xilinx Answer 20429) Platform Cable USB - Frequently Asked Questions (FAQ)
(Xilinx Answer 30184) iMPACT - "WARNING:iMPACT:923 - Cannot find cable, check cable setup" / "Cable connection failed"
(Xilinx Answer 29310) Platform Cable USB/USB-II - Libusb Driver support available on Linux
(Xilinx Answer 23060) Pb-free/Low-power Platform Cable USB - Windows XP and 2000 installation instructions for 8.1i SP3 or earlier
(Xilinx Answer 31397) Platform Cable USB - "A service installation section in this INF is invalid..."
(Xilinx Answer 22648) iMPACT - Installing Xilinx cable drivers on Linux operating system/kernel version 2.6

FPGA Device Specific Issues

The following are articles based on specific devices or solutions.

(Xilinx Answer 30212) Spartan-3AN - Known issues with In-System Programming (ISP) of the Spartan-3AN via SVF files
(Xilinx Answer 31794)  Platform Flash XL, EDK Support - How do I access the Platform Flash XL from an EDK design?
(Xilinx Answer 32653) Spartan-3/-3E/-3A/-3AN/-3DSP Families - I/Os glitch during power up or down, or a PROG_B pulse
(Xilinx Answer 16829) Virtex and Spartan FPGAs - How does the JTAG JPROGRAM instruction work?
(Xilinx Answer 3684)  FPGA Configuration -DONE Pin does not go HIGH...
(Xilinx Answer 11433) JTAG - Do the JTAG pins need external pull-ups? What should I do with unused JTAG pins?
(Xilinx Answer 3203) JTAG - General description of the TAP Controller states
(Xilinx Answer 33575)  Spartan-6 FPGA - JTAG Configuration Setup For Designs Using GTPs
(Xilinx Answer 30037) iMPACT 9.2.04i - Spartan-3AN Starter Kit board, JTAG programming fails
(Xilinx Answer 16832)  JTAG - What is a JTAG scan bridge, scan path linker, or JTAG multiplexor/JTAG mux?
(Xilinx Answer 8265) JTAG BSDL - What is the format of the IDCODE for Xilinx devices?
(Xilinx Answer 34032) Config - What is the relationship between the TCK output and clock input frequencies for XAPP424?
AR# 37250
Date 10/28/2015
Status Active
Type Solution Center
  • System ACE
  • Platform Flash
  • Spartan-6 LX
  • More
  • Spartan-6 LXT
  • Spartan-6Q
  • Spartan-3
  • Spartan-3A
  • Spartan-3A DSP
  • Spartan-3AN
  • Spartan-3E
  • Virtex
  • Less
  • ISE - 10.1
  • ISE Design Suite - 11.1
  • ISE Design Suite - 11.2
  • More
  • ISE Design Suite - 11.3
  • ISE Design Suite - 11.4
  • ISE Design Suite - 11.5
  • ISE Design Suite - 12.1
  • ISE Design Suite - 12.2
  • ISE Design Suite - 12.3
  • ISE Design Suite - 12.4
  • Less
Boards & Kits
  • Platform Cable USB
  • Platform Cable USB-II