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AR# 37406 Design Assistant for PCI Express - How to enumerate the endpoint when FPGA is configured after enumeration.

Description

This Answer Record gives a possible solution for Linux if the user wants to reconfigure the FPGA after PCIe enumeration.

NOTE: This Answer Record is part of the Xilinx Solution Center for PCI Express (Xilinx Answer 34536). The Xilinx Solution Center for PCI Express is available to address all questions related to PCIe. Whether you are starting a new design with PCIe or troubleshooting a problem, use the Solution Center for PCIe to guide you to the right information.

Solution

This method is intended for users who want to be able to reconfigure the FPGA but not re-boot the system, which is sometimes helpful when debugging problems. This is not intended to be used in an open system product. This is for Linux environments.

First issue a warm reset so that the system is up and running functionally. Then run the following command:

% cp /sys/bus/pci/deviced/0000:03:00:0/config myConfig

Where 03:00:0 is your own domain:bus:dev.func number that the BIOS chooses for you.
This will leave you with a file called myConfig with all the configuration data.

You can take a look at the content with the following command:
% od -x myConfig

Now the FPGA can be reconfigured using JTAG or some other method. To reinstate the PCIe configuration space in the endpoint, run the following command:

% cp myConfig /sys/bus/pci/devices/0000:03:00:0/config

The endpoint should be up and running now on your system.

Revision History
10/08/2010 - Initial Release

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
34871 Design Assistant for PCI Express - Using JTAG to Configure the Device N/A N/A
34777 Design Assistant for PCI Express - Device not recognized by system N/A N/A
34538 Xilinx Solution Center for PCI Express - Design Assistant N/A N/A

Actions

AR# 37406
Date Created 10/11/2010
Last Updated 12/15/2012
Status Active
Type General Article
IP
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )
  • Endpoint Block Plus Wrapper for PCI Express
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )
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