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AR# 37517 Design Assistant for PCI Express - Is it necessary to use only the recommended GTP/GTX locations in the User Guide?

The User Guides for the PCI Expresssolutions recommend GTP/GTX locations for different packages and lanes. Is it necessary to use only those locations, or can other locations be used as well?

NOTE: This Answer Record is part of the Xilinx Solution Center for PCI Express (Xilinx Answer 34536) The Xilinx Solution Center for PCI Express is available to address all questions related to PCIe. Whether you are starting a new design with PCIe or troubleshooting a problem, use the Solution Center for PCIe to guide you to the right information.

The recommended pin locations in the User Guides are the ones tested by Xilinx. Those are the supported pin locations and it is guaranteed to work for out of the box example design implementation with the core.Other pin locations might work as well, but they have not beentested.If you elect to useother pin-outsnot provided in the User Guides,you must verify that timing is met and functionality is intact.
Revision History:
10/11/2010- Initial Release

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
36174 Design Assistant for PCI Express - Start here for questions regarding Synthesis or Implementation N/A N/A
34538 Xilinx Solution Center for PCI Express - Design Assistant N/A N/A
AR# 37517
Date Created 10/13/2010
Last Updated 01/29/2013
Status Active
Type General Article
IP
  • Endpoint Block Plus Wrapper for PCI Express
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )
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