This section of the MIG Design Assistant focuses on SupportedData Widthsfor Spartan-6Memory Controller Block (MCB) designs. Below you will find information related to your specific question.
Note: This Answer Record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.
The Spartan-6MCB based memory controller supports data widths of up to16 bits of varying memory densities. See the "Supported Memory Configurations" section in (UG388) for full details.
The MIG tool provides the ability to select specific memory devices and to create custom memory parts through the Create Custom Part feature.For a list of the supported memory devices and details on the testing of custom parts, please see the "Supported Memory Devices" section in (UG388).
In some applications that require higher bandwidths and densities, youcancombine two MCBs, whichoffer more than 16-bit data widths.XAPP496 describes how to merge the operation of two or more MCBs to implement 32-bit or wider memory interfaces.
The MCB does notsupport combining two x8 memory components tomake anx16 wide data bus to connect asingle x16 MCB. This type of implementation makes DQ/DQS bus routing more complex,while performing PCB layout and also meeting the timing margins as recommended by the MCB PCB guidelines becomes difficult.