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AR# 37593 12.2 EDK, xps_sysmon - Where are the VP/VN I/O signals?

Description

Why do I see the VP/VN ports in the data sheet diagram but they are no where to be found in the ports list or in the HDL source code?

Solution

These pins are dedicated pins and EDK will always have these pins connected to the board and the user does not have to connect them to the xps_sysmon IP Core.

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AR# 37593
Date Created 09/10/2010
Last Updated 09/10/2010
Status Active
Type
Devices
  • Virtex-5 FXT
  • Virtex-5 LX
  • Virtex-5 LXT
  • More
  • Virtex-5 SXT
  • Virtex-5 TXT
  • Virtex-5Q
  • Virtex-5QV
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
Tools
  • EDK - 11.1
  • EDK - 11.2
  • EDK - 11.3
  • More
  • EDK - 11.4
  • EDK - 11.5
  • EDK - 12.1
  • EDK - 12.2
  • EDK - 12.3
  • EDK - 13.1
  • Less
IP
  • XPS SYSMON Analog Digital Converter (ADC)
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