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AR# 37634

12.2 EDK, PPC440MC_DDR2 - WARNING:EDK - : Bit 8:9 of C_PPC440MC_CONTROL is set to 00


When trying to generate the netlist for my ppc440mc_ddr2, I receive the following warnings and errors:

WARNING:EDK - : Bit 8:9 of C_PPC440MC_CONTROL is set to 00 but it should be set to 144 according to your C_DDR_DWIDTH setting
ERROR:EDK:3193 - issued from TCL procedure
"::hw_ppc440mc_ddr2_v3_00_b::syslevel_check_micontrol" line 165
DDR2_SDRAM_DIMM0 (ppc440mc_ddr2) - The suggested value for ppc440_0(PPC440)
C_PPC440MC_CONTROL is 0xF81444202311.
ERROR:EDK:440 - platgen failed with errors!

How do I resolve this issue?


This error is due to an incorrect comparison in the .tcl file that does not account for C_DDR_DWIDTH when ECC is enabled. It can be safely ignored.

This issue can be also fixed by changing the ppc440mc_ddr2_v2_1_0.tcl as follows:

## Calculate Bit 8_9
# get C_DDR_DWIDTH of ppc440mc_ddr2
set param_ecc_check [xget_hw_parameter_value $mhsinst C_INCLUDE_ECC_SUPPORT]
if {[string length $param_ecc_check] > 0} {
set param_ddr_dwidth [xget_hw_parameter_value $mhsinst C_DDR_DWIDTH]
set param_ddr_dwidth [ expr "$param_ddr_dwidth" - 8]
}else {
set param_ddr_dwidth [xget_hw_parameter_value $mhsinst C_DDR_DWIDTH]
##set param_ddr_dwidth [xget_hw_parameter_value $mhsinst C_DDR_DWIDTH]
if {[string length $param_ddr_dwidth] > 0} {
set bit8_9 [string range $param_ppc440mc_control_bin 8 9]
set bit8_9_calc [string map {128 00 64 01 32 11} [expr {$param_ddr_dwidth * 2}]]
if { [string equal $bit8_9_calc $bit8_9]} {
} else {
puts "Warning: Bit 8:9 of C_PPC440MC_CONTROL is set to $bit8_9 but it should be set to $bit8_9_calc according to your C_DDR_DWIDTH setting"
set print_suggestion 1

This issue is scheduled to be fixed starting with EDK 12.4 in the latest version of the core.
AR# 37634
Date Created 09/10/2010
Last Updated 05/19/2012
Status Active
Type Error Message
  • PowerPC 440