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AR# 37638

12.3 EDK AXI_Ethernet_v1_00_a - Usage of the AVB Endpoint feature with AXI_Ethernet in EDK

Description

The AXI Ethernet driver in EDK 12.3 does not support the AVB functionality. This Answer Record details the steps necessaryto port the driver to the EDK environment.

Solution


AXI Ethernet Configuration Requirements
The AVB Endpoint Core is enabledin AXI Ethernet by setting the parameter C_AVB=1. To ensure that AVB Audio and Video frames can be sent or received, the AXI Ethernet MAC should be configured via software initialization such that:
  • Jumbo frames are disabled
  • VLAN is enabled (Note: Extended VLAN support is not supported; The VLAN frame transmission and reception must be enabled in the Transmit/Receive Configuration Word)
  • The MAC is set to operate in promiscuous mode (the TEMAC Ethernet MAC address filter is disabled).

For further information on how to access these registers, refer directly to the LogiCORE IP AXI Ethernet (v1.00a) Product Specification (DS759):
http://www.xilinx.com/support/documentation/ip_documentation/ds759_axi_ethernet.pdf
For more information on the AVB endpoint feature, refer to the LogiCORE IP Ethernet AVB Endpoint v2.4 User Guide(UG492):
http://www.xilinx.com/support/documentation/ip_documentation/eth_avb_endpoint_ug492.pdf

Porting the driver to the SDK environment
  1. Download the driver files from:
    http://www.xilinx.com/txpatches/pub/applications/misc/ar37638_axieth100a_avbdriver.zip
  2. Extract the archive to your work area. xavb_example.c in this directory is the example file andthe otherfiles in the directory implement the AVB functionality.
  3. Addthese files as sources to your software application.

Running the driver example design
  1. Download the updatedAXI Ethernet core fromhttp://www.xilinx.com/txpatches/pub/applications/misc/ar37638_axieth100a.zip
  2. Extract the archiveto the pcores folder of your project - <Project>\pcores
  3. Create the hardware design in EDK with the AVB core enabled.The exampledesign requires theAVB interrupts to be connected to theinterrupt controller.
  4. Export the Hardware Design to SDK from EDK
  5. Launch SDK
  6. In the SDK GUI:
    a. Create the Board Support Package Project (File->New->Xilinx Board Support Package and select standalone).
    b. Create an SDK Project ( File->New->Xilinx C Project and target the Board Support package created in the previous step).
    c. Select the Empty Application Project Template .
    d. Add all the driver files downloaded in the previous section, including the xavb_example.c file to this project.
    e.Generate the linker script and build the software.
    f. Download the elf image to the hardware and run it.

Uponsuccessful execution of the example design, following is the display on the terminal console:

--- Entering main() ---

*** XAvb_Reset() : Call XAvb_BecomeRtcMaster() ***

*** I am now the Grand Master ***
NOTICE: timestamps are now certain

GMDiscontinuityHandler: Timestamps are now certain

** XAvb_Reset(): PTP Driver Reset **
XAvb_DecodeTxAnnounceFrame()
* BMC : I am the MASTER
-----------------------
Local Announce Frame
-----------------------
GM ID upper A35FF
GM ID lower FE010203
Priority1 A0
clockClass 0
Priority2 0
*** XAvb_DecodeTxAnnounceFrame() : Call XAvb_BecomeRtcMaster() ***

** XAvb_Start(): Starting PTP **
Example passed

--- Exiting main() ---


The example design, xavb_example.cruns the following sequence of operations:
  • AxiEthernet driver is initialized.
  • AVB/PTP driver is initialized.
  • "AvbGMDiscontinuityHandler" callback handler is set up for handling possible discontinuity in GrandMaster time.
  • AVB hardware is initialized. The AVB system is the GrandMaster. The AvbGMDiscontinuityHandler is invoked by the PTP driver.
  • AxiEthernet Transmitter/Receiver are enabled with basic VLAN enabled, Jumbo frames disabled and put in promiscuous mode.
  • Initialize the AVB RTC reference clock.
  • The AxiEthernet/PHY is configured for 1000 Mb/s (GMII) and is put in loopback mode.
  • InterruptController hardware and driver are initialized.
  • The AVB/PTP driver is started and this starts the PTP state machine. The Best Master Clock Algorithm is run.
  • The PTP Timer and PTP Rx interrupts are enabled in the InterruptController hardware.
  • PDelay_Req packet is sent from the PTP Timer ISR after a duration of 8/128 second.
  • PDelay_Req packet is received back in the PTP Rx ISR as the PHY is in loopback.
  • PDelay_Resp packet followed by a PDelay_RespFollowUp packet are sent in the PTP Rx IXR as a response to the received PDelay_Req packet.
  • PDelay_Resp packet and PDelay_RespFollowUp packet are received back in the PTP Rx ISR.
  • Since the source port identity of the received packets matches with the systems own source port identity, no further processing is done and the example exits.
AR# 37638
Date Created 11/24/2010
Last Updated 05/19/2012
Status Active
Type Known Issues
Tools
  • EDK - 12.3
IP
  • Ethernet AVB
  • AXI Ethernet