When I implement the default design generated by theCORE Generator software for the ML605 board, an error similar to the following occurs:
"ERROR:ConstraintSystem:59 - Constraint <INST "core/pcie_2_0_i/pcie_gt_i/gtx_v6_i/GTXD[0].GTX" LOC = GTXE1_X0Y15;>
[../../example_design/xilinx_pcie_2_0_ep_v6_08_lane_gen1_xc6vlx240t-ff1156-1_ML605.ucf(111)]: INST "core/pcie_2_0_i/pcie_gt_i/gtx_v6_i/GTXD[0].GTX" not found. Please verify that:
1. The specified design element actually exists in the original design.
2. The specified object is spelled correctly in the constraint source file."
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