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AR# 38064 Design Assistant for PCI Express - What happens when there are multiple errors in a TLP

What happens if a TLP contains multiple errors?

NOTE: This Answer Record is part of the Xilinx Solution Center for PCI Express (Xilinx Answer 34536). The Xilinx Solution Center for PCI Express is available to address all questions related to PCIe. Whether you are starting a new design with PCIe or troubleshooting a problem, use the Solution Center for PCIe to guide you to the right information.
Xilinx cores are compliant with the Error Pollution section of PCI Express Base Specification. See section 6.2.3 for more information. This section explains that if a TLP contains multiple errors, only one is reported. For example, if the data link layer reports an error on a given TLP andif another error with the same TLP is found in the transaction layer, it will not be reported. See the specification for more details on how errors are classified and reported.

Revision History
10/08/2010 - Initial Release

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
36062 Design Assistant for PCI Express - Start here with questions about core functionality or protocol N/A N/A
34538 Xilinx Solution Center for PCI Express - Design Assistant N/A N/A
AR# 38064
Date Created 10/11/2010
Last Updated 12/15/2012
Status Active
Type General Article
IP
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )
  • Endpoint Block Wrapper for PCI Express
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )
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