InMIG 3.6 and earlier versions when self-refresh mode is used with the FPGA suspend feature, the MCB is reset resulting in corruption of DRAM data. This is caused bythe LOCK signalof the PLL going low during a suspend operation. Thesoft calibration module incorrectly resets the MCB when the PLL lock signal is initially low after the FPGA exits the suspend mode. Thereset to the MCB will cause a power-up calibration, which writes to the address specified inC_MC_CALIBRATION_RA,C_MC_CALIBRATION_BA,C_MC_CALIBRATION_CA, overwriting the previous content.This behavior is only seen in Suspend/self-refresh mode and not in self-refresh only mode.
The expected behavior is for the FPGA to come out of suspend modeand the DRAM to exit self-refresh mode without the MCB entering the power-up calibration sequence.Xilinx has determined the root cause for this issue and is making the necessary changes to MIG.
To work around this issue, rtl updates to themcb_raw_wrapper.v/vhd and mcb_soft_calibration.v/.vhd files are required. These files are located in both the 'user_design/rtl' and 'example_design/rtl' directories. The following ftp location contains the updated files that should be used over those generated by MIG v3.6:
http://www.xilinx.com/txpatches/pub/swhelp/coregen/38696.zip This issue only exists in MIG v3.6 and earlier versions and is resolved in MIG v3.7 which will be released with ISE 13.1 software.
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