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AR# 38730 14.1 EDK, MPMC v6.05.a - VFBC on Virtex-6 produces corrupted video if block RAM read FIFO is selected


If block RAM is selected for the MPMC read FIFO when using a VFBC port, the video horizontally shifts to the left periodically once every couple of seconds.

How do I resolve this issue?


To work around this problem, select SRL FIFO for both the Read VFBC ports.

Currently, there are no plans to fix this issue.
AR# 38730
Date Created 01/26/2011
Last Updated 05/14/2012
Status Active
Type
Devices
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
Tools
  • EDK - 12.4
  • EDK - 13.1
  • EDK - 13.2
  • More
  • EDK - 13.3
  • EDK - 13.4
  • EDK - 14.1
  • Less
IP
  • Multi-Port Memory Controller (MPMC)
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