Design Advisory Answer Records are created for issues that are important to designs currently in progress and are selected to be included in the Xilinx Alert Notification System: http://www.xilinx.com/support/myalerts.
This Design Advisory covers the Virtex-6 FPGA Broadcast Connectivity Kit including criticalissues with the reference design delivered with the kit.
Design Advisories Alerted on November 1, 2010:
10/29/2010 - (Xilinx Answer 38683) Broadcast Connectivity Kit - ML605 Board BOM change causes SDI demos issues
09/25/2012 - Minor update; no change to content
09/13/2011 - Minor edit to title
06/29/2011 - Minor update to title
11/01/2010 - Initial Release with Answer Record 38683
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