When creating a DDR2 MIG design with the AXI interface enabled and after importing my pre-fixed pinouts, I cannot select the BUFIO:0 and BUFIO:1pins in the MIG GUI, or any resources. If I assign the BUFIO:0 and BUFIO:1pins manually, the following error displays without the BUFIO recommendations:
"ERROR: BUFIO Constraint for the Capture Clock - "gen_ck_cpt" is not provided or provided BUFIO constraint is invalid. Following is (are) the valid BUFIO Constraints for this Capture Clock. But verify whether any of these IOB sites are utilized by any other constraints or Pin LOC's."
How can I solve this issue?
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The BUFIO placement requires that each DQS group in a bankbe associated with a CC-P pin reserved for BUFIO. Based onthe pin selection for DQ, DQS/DQS#, addr, the control signals, and so on, there might not be any CC-P pins available to choose from.
Please check the pinouts carefully and make sure that there are valid sites to reserve for BUFIO and BUFR. The error messageshould have stated more clearly that no CC-P sites are available to select for BUFIO and BUFR.