I want to run the DDR3 on a lower clock speed than Xilinx offers. According to the FAQ from the Micron website, their DDR3 SDRAMs can work with the DLL on their component turned Off:
Does the Xilinx MIG controller support this?
No, MIG does not support disabling the DLL to run the controller at slower clock frequencies for any memory device or FPGA family.
NOTE: The MRS_DLL_RESET parameter in the MIG Virtex-6 RLDRAM II designs must be set to "DLL_ON" as turning this parameter Off is not supported.