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AR# 39079 Design Assistant for XST - Help with inference issues

Please refer to this answer record for help debugging inference issues with XST.

Note: This Answer Record is a part of the Xilinx Solution Center for XST (Xilinx Answer 38927) The Xilinx Solution Center for XST is available to address all questions related to XST. Whether you are starting a new design or troubleshooting a problem, use the Solution Center for XST to guide you to the right information.
XST has the ability to infer many different macros. Occasionally, XST does not infer the intended macro.

See (Xilinx Answer 39133) for help on inference concerns withShift Registers.

See (Xilinx Answer 39134) for helpon inference concerns with RAM or ROM.

See (Xilinx Answer 39135) for helpon inference concerns with DSP blocks.

See (Xilinx Answer 39136) for help explaining why latches may be inferred.

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
38927 Xilinx Solution Center for XST N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
39469 Design Assistant for XST - Help with coding issues N/A N/A
39136 Design Assistant for XST Reasons why a latch is inferred N/A N/A
39135 Design Assistant for XST How to infer DSP blocks N/A N/A
39133 Design Assistant for XST - Inference concerns with a Shift Register N/A N/A
39134 Design Assistant for XST Inference concerns with RAM and ROM N/A N/A
AR# 39079
Date Created 03/14/2011
Last Updated 12/15/2012
Status Active
Type General Article
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