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AR# 39094

"SIM_RECEIVER_DETECT_PASS" variable is being set to "1" incorrectly by Precision for the X_GTPA1_DUAL simulation Model

Description

The Simprim component X_GTPA1_GUAL contains a variable "SIM_RECEIVER_DETECT_PASS" which is defined as type boolean.
 

The Precision Synthesis tool propagates "TRUE" as a "1" which is of type integer.

When running simulation for a design, an error occurs when using post Translate, post MAP or post P&R simulation models.

This happens because the "1" has propagated through the ISE toolset and is contained in the simulation model.
 

The Error Received is similar to the following:
 

     # -- Loading entity fpga
     # ** Error: ../ISE/SMA_SMAClk/netgen/par/fpga_timesim.vhd(591):
Integer literal 1 is not of type std.standard.boolean.
     # ** Error: ../ISE/SMA_SMAClk/netgen/par/fpga_timesim.vhd(1432):
VHDL Compiler exiting

 
 

Solution

This is a known issue and can easily be worked around by modifying the simulation model to change the setting for SIM_RECEIVER_DETECT_PASS to "TRUE".
 

In the above example, modify line 591 in fpga_timesim.vhd from:
 

   SIM_RECEIVER_DETECT_PASS => 1,

to:
 

   SIM_RECEIVER_DETECT_PASS => TRUE,

AR# 39094
Date Created 11/15/2010
Last Updated 01/20/2015
Status Active
Type General Article