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AR# 39371

Spartan-6 FPGA Integrated Block Wrapper for PCI Express (AXI) - Resolved issues in v2.2


This article contains issues resolved in theSpartan-6 FPGA Integrated Block v2.2 Wrapper for PCI Express that are alsolisted in the readme.txt file that accompanies this version of the core. These are issues that were fixed as part of the update from the previous version of the core.

For other known and resolved issues that may not be in this list see(Xilinx Answer 45702)


Resolved Issues
  • VHDL source code generation support added.
    • CR 582418
    • VHDL source code generation now supported. Also includes Example Design, testbench and simulation and implementation scripts.

Revision History
01/18/2012 - Modified format to use a single AR for all known issues and referenced 45702 for all known issues. Any issue that was listed here is now in AR 45702.
03/01/2011 - Added 40626
12/24/2010 - Initial Release

Linked Answer Records

Child Answer Records

Associated Answer Records

AR# 39371
Date Created 12/08/2010
Last Updated 05/20/2012
Status Active
Type Release Notes
  • Spartan-6 LXT
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )