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AR# 39421

14.x Timing - Why do I see two timing parameters for the same block RAM pin?

Description

Why do I see two timing parameters for the same block RAM pin?

Solution

This is because the analysis of the block RAMs has changed so that it is possible to read and write at the block RAMs simultaneously. So, there are two clock-to-outs on the same pin; one for the lower clock and one for the upper clock.

From the timing delay definitions, Trcko_DORB would be related to the registered output of the B side of the block RAM.
From the timing delay definitions, Trcoko_DOPB would be related to the party output bus of the B side of the block RAM.

AR# 39421
Date Created 11/13/2012
Last Updated 11/13/2012
Status Active
Type General Article
Tools
  • ISE Design Suite - 12.1
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  • ISE Design Suite - 12.4
  • ISE Design Suite - 13.1
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  • ISE Design Suite - 14.1
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