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AR# 39460

LogiCORE IP V5 Tri-Mode Ethernet MAC - Debugging SGMII link issues


I have connected my V5 Tri-Mode Ethernet MAC to an ethernet switch via a SGMII link. However, I don't see any packets reported at the switch port. Whatcan I check in the FPGA side to debug thisissue?


The following are some tips that might be useful todebug the issue.

1. Make sure auto-negotiation is either disabled or enabled at both sides of the link.

2.Check with TEMAC internal loopback and loopback in the GTP/GTX.

3. Confirm the UCF has the correct pin locations.Consult board schematics.

4. If it is possible, probe the link on the boardto see if there is any activity whena packet is trasmitted from the MAC.

5. Try loopback in the switch if it allows to do so.

6.Probe with Chipscope Pro at the TX and RX side of the GTP/GTX interface. Activity at the TX side will indicate whether a packet made it to GTP/GTX or not. Activity at the RX side will indicate the packet indeed arrived in the FPGA, from the link partner. If there is some activity at the receive side, then probe MAC signals such as good frame and bad frame signals.

7. Make sure the timing in the design is met.

8. Modify the GTP/GTX parameter to test with different values of RXEQMIX, TXPREEMPHASIS and TXDIFFCTRL.
9. If this is a custom board, try with a Xilinx Demo Board if available.

10. Try connecting with a different link partner if possible.

If the above doesn't resolve the problem, open a webcase with Xilinx Technical Support. Also, check with the ethernet switch vendor to make sure the switch configurationhas been done correctly or not.

Revision History:

03/12/2010 - Initial Release
AR# 39460
Date 12/15/2012
Status Active
Type General Article
  • Virtex-5 Embedded Tri-Mode Ethernet MAC
  • Ethernet 1000BASE-X PCS/PMA or SGMII
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