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AR# 39566

12.1/12.2/12.3 iMPACT - Virtex-6 - Stand alone Read Status Register returns all 0


When I read back the Virtex-6 FPGA Status Register from the Debug menu in iMPACT, I see all '0' in the Status Register. Why is this?


After configuration via iMPACT and the subsequent "Status Register Read" included the device is left Synchronized. This means that for a stand alone "Status Register Read" the device is in an unexpected JTAG state and hence the Status Register comes back as all '0'. This issue is resolved in ISE 12.4 software.

Alternately, this may be due to some of the reasons listed in (Xilinx Answer 34599) - iMPACT - Status Register read shows all '0'.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
35448 12.x iMPACT - Known Issues N/A N/A
AR# 39566
Date 12/15/2012
Status Active
Type General Article
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Virtex-6Q
  • Less
  • ISE Design Suite - 12.1
  • ISE Design Suite - 12.2
  • ISE Design Suite - 12.3
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