We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 39724

12.4 ChipScope IBERT - RX clocks wrong frequency in GTH design


When I run a Virtex-6 HXT GTH IBERT design in 12.4, the RX clocks are an incorrect frequency. The TX clocks are operating at the proper rate.


This issue might occur if you are using the reference clock from an adjacent GTH quad tile on 2.0 Silicon. IBERT functions correctly, but you might see reduced line rates or clock frequencies.

Moving to 2.1 silicon resolves this issue.

There is no IBERT fix for this issue.

AR# 39724
Date Created 02/09/2011
Last Updated 12/15/2012
Status Active
Type General Article
  • ChipScope Pro - 12.4