When the FIR Compiler v6.1 block is used in a System Generator design with ratetype = fixed_fractional, both decimation and interpolation always forces the Hardware Oversampling format to "Sample Period" mode.
The FIR Compiler has several options for ratetype that the user can normally select from the Block GUI. When the FIR Compiler v6.1 block is used in a System Generator design with ratetype = fixed_fractional, both decimation and interpolation always forces the Hardware Oversampling format to "Sample Period" mode. In previous versions of the core, decimation always forced this,but v6.1 has been changed so interpolation also forces this option.