1. INTRODUCTION
For installation instructions for this release, please go to:
http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm
For system requirements:
http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm
This file contains release notes for the Xilinx LogiCORE IP Virtex-6 FPGA GTH
Transceiver Wizard v1.6 solution. For the latest core updates, see the product
page at:
http://www.xilinx.com/products/intellectual-property/V6_FPGA_GTH_Transceiver_Wizard.htm
2. NEW FEATURES
- ISE 12.4 software support
3. SUPPORTED DEVICES
The following device families are supported by the core for this release.
Virtex-6 xc6vhx255t, xc6vhx380t, xc6vhx565t
4. RESOLVED ISSUES
- Fixed CR # 575515
- Implemented AR # 37412 - Updated Initialization sequence
- Implemented AR # 37414 - Attribute Updates
- Added 1/2, 1/8 line rate support
- Removed 10GBASE-KR protocol template
- Fixed CR # 579821 - Removed 10GBASE KR protocol support
- Fixed CR # 579787 - Updated the GUI to show-up 16, 20 bit datapath widths only when the same line rate and same datapath widths is configured across multiple lanes
- Fixed CR # 574905 - Added TX_CLK_SEL1_LANE<n> parameter in the wizard
wrapper
5. KNOWN ISSUES
The following are known issues for v1.6 of this core at time of release:
- Virtex-6 solutions are pending hardware validation
- Attribute and port settings for OTU-4 are applicable to single lane only. User has to integrate other OTU-4 compatible logic manually in their design
- For 16 and 20 bit datapath widths, multiple line rates and multiple datapath widths cannot be selected across multiple lanes
The most recent information, including known issues, workarounds, and resolutions for the Virtex-6 GTH Transceiver Wizard and the GTH Transceiver itself can be found in (Xilinx Answer 38596)
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 38596 | Virtex-6 FPGA GTH Transceiver - Known Issues and Answer Records List | N/A | N/A |